| Title: | First Experimental Demonstration of Gate-all-around III-V MOSFET by Top-down Approach |
| Author: |
Gu, Jiangjiang; Liu, Yiqun; Wu, Yanqing; Colby, Robert; Gordon, Roy Gerald; Ye, Peide D.
Note: Order does not necessarily reflect citation order of authors. |
| Citation: | Gu, Jianjiang, Yiqun Liu, Yanqing Wu, Robert Colby, Roy G. Gordon, and Peide D. Ye. 2011. First experimental demonstration of gate-all-around III-V MOSFET by top-down approach. Paper presented at the 2011 IEEE International Electron Devices Meeting, Washington, D.C. |
| Full Text & Related Files: |
IEDM2011-GAA-final.pdf (1.900Mb; PDF)
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| Abstract: | The first inversion-mode gate-all-around (GAA) III-V MOSFETs are experimentally demonstrated with a high mobility In0.53Ga0.47As channel and atomic-layer-deposited (ALD) Al2O3/WN gate stacks by a top-down approach. A well-controlled InGaAs nanowire release process and a novel ALD high-k/metal gate process has been developed to enable the fabrication of III-V GAA MOSFETs. Well-behaved on-state and off-state performance has been achieved with channel length (Lch) down to 50nm. A detailed scaling metrics study (S.S., DIBL, VT) with Lch of 50nm - 110nm and fin width (WFin) of 30nm - 50nm are carried out, showing the immunity to short channel effects with the advanced 3D structure. The GAA structure has provided a viable path towards ultimate scaling of III-V MOSFETs. |
| Other Sources: | http://arxiv.org/abs/1112.3573 |
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| Citable link to this page: | http://nrs.harvard.edu/urn-3:HUL.InstRepos:8231688 |
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