Effects of Forming Gas Anneal on Ultrathin InGaAs Nanowire Metal-Oxide-Semiconductor Field-Effect Transistors

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Effects of Forming Gas Anneal on Ultrathin InGaAs Nanowire Metal-Oxide-Semiconductor Field-Effect Transistors

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Title: Effects of Forming Gas Anneal on Ultrathin InGaAs Nanowire Metal-Oxide-Semiconductor Field-Effect Transistors
Author: Si, Mengwei; Gu, Jiangjiang J.; Wang, Xinwei; Shao, Jiayi; Li, Xuefei; Manfra, Michael J.; Gordon, Roy Gerald; Ye, Peide D.

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Citation: Si, Mengwei, Jiangjiang J. Gu, Xinwei Wang, Jiayi Shao, Xuefei Li, Michael J. Manfra, Roy Gerald Gordon, and Peide D. Ye. 2013. Effects of forming gas anneal on ultrathin InGaAs nanowire metal-oxide-semiconductor field-effect transistors. Applied Physics Letters 102(9): 093505.
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Abstract: InGaAs gate-all-around metal-oxide-semiconductor field-effect transistors (MOSFETs) with 6 nm nanowire thickness have been experimentally demonstrated at sub-80 nm channel length. The effects of forming gas anneal (FGA) on the performance of these devices have been systematically studied. The 30 min \(400^{\circ}C\) FGA \((4\%H_2/96\%N_2)\) is found to improve the quality of the \(Al_2O_3/InGaAs\) interface, resulting in a subthreshold slope reduction over 20 mV/dec (from 117 mV/dec in average to 93 mV/dec). Moreover, the improvement of interface quality also has positive impact on the on-state device performance. A scaling metrics study has been carried out for FGA treated devices with channel lengths down to 20 nm, indicating excellent gate electrostatic control. With the FGA passivation and the ultra-thin nanowire structure, InGaAs MOSFETs are promising for future logic applications.
Published Version: doi:10.1063/1.4794846
Terms of Use: This article is made available under the terms and conditions applicable to Open Access Policy Articles, as set forth at http://nrs.harvard.edu/urn-3:HUL.InstRepos:dash.current.terms-of-use#OAP
Citable link to this page: http://nrs.harvard.edu/urn-3:HUL.InstRepos:10384785
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