High Performance Atomic-Layer-Deposited \(LaLuO_3/Ge\)-on-Insulator p-Channel Metal-Oxide-Semiconductor Field-Effect Transistor with Thermally Grown \(GeO_2\) as Interfacial Passivation Layer
Access StatusFull text of the requested work is not available in DASH at this time ("dark deposit"). For more information on dark deposits, see our FAQ.
Gu, J. J.
Liu, Y. Q.
Celler, G. K.
Ye, P. D.
MetadataShow full item record
CitationGu, J. J., Y. Q. Liu, M. Xu, G. K. Celler, Roy Gerald Gordon, and P. D. Ye. 2010. High performance atomic-layer-deposited\(LaLuO_3/Ge\)-on-insulator p-channel metal-oxide-semiconductor field-effect transistor with thermally grown \(GeO_2\) as interfacial passivation layer. Applied Physics Letters 97(1): 012106.
AbstractEnhancement-mode p-channel metal-oxide-semiconductor field-effect transistor (MOSFET) on germanium-on-insulator substrate is fabricated with atomic-layer-deposited (ALD) \(LaLuO_3\) as gate dielectric. Significant improvement in both on-state current and effective hole mobility has been observed for devices with thermal \(GeO_2\) passivation. The negative threshold voltage \((V_T)\) shift in devices with \(GeO_2\) interfacial layer (IL) further demonstrates the effectiveness of surface passivation. Results from low temperature mobility characterization show that phonon scattering is the dominant scattering mechanism at a large inversion charge, indicating good interface quality. The combination of higher-k \(LaLuO_3\) and ultrathin \(GeO_2\) IL is a promising solution to the tradeoff between the aggressive equivalent oxide thickness scaling and good interface quality.
Citable link to this pagehttp://nrs.harvard.edu/urn-3:HUL.InstRepos:10454583
- FAS Scholarly Articles