Load-Balanced LU and QR Factor and Solve Routines for Scalable Processors with Scalable I/O

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Load-Balanced LU and QR Factor and Solve Routines for Scalable Processors with Scalable I/O

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Title: Load-Balanced LU and QR Factor and Solve Routines for Scalable Processors with Scalable I/O
Author: Brunet, Jean-Philippe; Pederson, Palle; Johnsson, S. Lennart

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Citation: Brunet, Jean-Philippe, Palle Pedersen, and S. Lennart Johnsson. 1994. Load-Balanced LU and QR Factor and Solve Routines for Scalable Processors with Scalable I/O. Harvard Computer Science Group Technical Report TR-20-94.
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Abstract: The concept of block-cyclic order elimination can be applied to out-of-core LU and QR matrix factorizations on distributed memory architectures equipped with a parallel I/O system. This elimination scheme provides load balanced computation in both the factor and solve phases and further optimizes the use of the network bandwidth to perform I/O operations. Stability of LU factorization is enforced by full column pivoting. Performance results are presented for the Connection Machine system CM-5.
Terms of Use: This article is made available under the terms and conditions applicable to Other Posted Material, as set forth at http://nrs.harvard.edu/urn-3:HUL.InstRepos:dash.current.terms-of-use#LAA
Citable link to this page: http://nrs.harvard.edu/urn-3:HUL.InstRepos:25811010
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