Low-Complexity Systolic V-BLAST Architecture

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Low-Complexity Systolic V-BLAST Architecture

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Title: Low-Complexity Systolic V-BLAST Architecture
Author: Koike-Akino, Toshiaki
Citation: Toshiaki, Koike-Akino. Forthcoming. Low-Complexity systolic V-BLAST Architecture. IEEE Transactions on Wireless Communications.
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Abstract: In multiple-input multiple-output systems, an ordered successive interference canceller, termed the vertical Bell laboratories space-time (V-BLAST) algorithm, offers good performance. This letter presents a low-complexity V-BLAST scheme suited for parallel implementation. The proposed scheme, using a greedy ordering, can achieve a performance comparable to that of V-BLAST with optimum ordering, while its computational complexity is lower than a linear detector.
Published Version: http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=7693
Terms of Use: This article is made available under the terms and conditions applicable to Open Access Policy Articles, as set forth at http://nrs.harvard.edu/urn-3:HUL.InstRepos:dash.current.terms-of-use#OAP
Citable link to this page: http://nrs.harvard.edu/urn-3:HUL.InstRepos:2748552
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