A fully-integrated 3-level DC/DC converter for nanosecond-scale DVS with fast shunt regulation
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CitationWonyoung Kim, David M. Brooks, Gu-Yeon Wei. 2011. "A fully-integrated 3-level DC/DC converter for nanosecond-scale DVS with fast shunt regulation." Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 20-24 February 2011, San Francisco, CA, 268-270. IEEE International. doi:10.1109/ISSCC.2011.5746313
AbstractIn recent years, chip multiprocessor architectures have emerged to scale performance while staying within tight power constraints. This trend motivates per core/block dynamic voltage and frequency scaling (DVFS) with fast voltage transition. Given the high cost and bulk of off-chip DC/DC converters to implement multiple on-chip power domains, there has been a surge of interest in on-chip converters. This paper presents the design and experimental results of a fully integrated 3-level DC/DC converter that merges characteristics of both inductor-based buck and switched-capacitor (SC) converters. While off-chip buck converters show high conversion efficiency, their on-chip counterparts suffer from loss due to low quality inductors. With the help of flying capacitors, the 3-level converter requires smaller inductors than the buck converter, reducing loss and on-die area overhead. Compared to SC converters that need more com plex structures to regulate higher than half the input voltage, 3-level converters can efficiently regulate the output voltage across a wide range of levels and load currents. Measured results from a 130nm CMOS test-chip prototype demon strate nanosecond-scale voltage transition times and peak conversion efficiency of 77%.
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