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dc.contributor.authorLyons, Michael
dc.contributor.authorWei, Gu-Yeon
dc.contributor.authorBrooks, David M.
dc.date.accessioned2018-01-24T18:34:58Z
dc.date.issued2013
dc.identifier.citationLyons, Michael, Gu-Yeon Wei, and David Brooks. 2013. “Shrink-Fit: A Framework for Flexible Accelerator Sizing.” IEEE Comput. Arch. Lett. 12 (1): 17–20. doi:10.1109/l-ca.2012.7.en_US
dc.identifier.issn1556-6056en_US
dc.identifier.urihttp://nrs.harvard.edu/urn-3:HUL.InstRepos:34729347
dc.description.abstractRTL design complexity discouraged adoption of reconfigurable logic in general purpose systems, impeding opportunities for performance and energy improvements. Recent improvements to HLS compilers simplify RTL design and are easing this barrier. A new challenge will emerge: managing reconfigurable resources between multiple applications with custom hardware designs. In this paper, we propose a method to "shrink-fit" accelerators within widely varying fabric budgets. Shrink-fit automatically shrinks existing accelerator designs within small fabric budgets and grows designs to increase performance when larger budgets are available. Our method takes advantage of current accelerator design techniques and introduces a novel architectural approach based on fine-grained virtualization. We evaluate shrink-fit using a synthesized implementation of an IDCT for decoding JPEGs and show the IDCT accelerator can shrink by a factor of 16x with minimal performance and area overheads. Using shrink-fit, application designers can achieve the benefits of hardware acceleration with single RTL designs on FPGAs large and small.en_US
dc.description.sponsorshipEngineering and Applied Sciencesen_US
dc.language.isoen_USen_US
dc.publisherInstitute of Electrical & Electronics Engineers (IEEE)en_US
dc.relation.isversionofdoi:10.1109/L-CA.2012.7en_US
dash.licenseMETA_ONLY
dc.subjectHeterogeneous (hybrid) systemsen_US
dc.subjectReconfigurable hardwareen_US
dc.subjectSpecial-Purpose and Application-Based Systemsen_US
dc.titleShrink-Fit: A Framework for Flexible Accelerator Sizingen_US
dc.typeJournal Articleen_US
dc.description.versionVersion of Recorden_US
dc.relation.journalIEEE Computer Architecture Lettersen_US
dash.depositing.authorBrooks, David M.
dash.embargo.until10000-01-01
dc.identifier.doi10.1109/L-CA.2012.7*
workflow.legacycommentsoap.needman (MM)en_US
dash.contributor.affiliatedLyons, Michael John
dash.contributor.affiliatedBrooks, David
dash.contributor.affiliatedWei, Gu-Yeon


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