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dc.contributor.advisorGordon, Roy Gerald
dc.contributor.authorAu, Yeung Billy
dc.date.accessioned2012-07-24T13:10:04Z
dc.date.issued2012-07-24
dc.date.submitted2012
dc.identifier.citationAu, Yeung Billy. 2012. Chemical Vapor Deposition of Thin Film Materials for Copper Interconnects in Microelectronics. Doctoral dissertation, Harvard University.en_US
dc.identifier.otherhttp://dissertations.umi.com/gsas.harvard:10227en
dc.identifier.urihttp://nrs.harvard.edu/urn-3:HUL.InstRepos:9288544
dc.description.abstractThe packing density of microelectronic devices has increased exponentially over the past four decades. Continuous enhancements in device performance and functionality have been achieved by the introduction of new materials and fabrication techniques. This thesis summarizes the thin film materials and metallization processes by chemical vapor deposition (CVD) developed during my graduate study with Professor Gordon at Harvard University. These materials and processes have the potential to build future generations of microelectronic devices with higher speeds and longer lifetimes. Manganese Silicate Diffusion Barrier: Highly conformal, amorphous and insulating manganese silicate \((MnSi_xO_y)\) layers are formed along the walls of trenches in interconnects by CVD using a manganese amidinate precursor vapor that reacts with the surfaces of the insulators. These \((MnSi_xO_y)\) layers are excellent barriers to diffusion of copper, oxygen and water. Manganese Capping Layer: A selective CVD manganese capping process strengthens the interface between copper and dielectric insulators to improve the electromigration reliability of the interconnects. High selectivity is achieved by deactivating the insulator surfaces using vapors containing reactive methylsilyl groups. Manganese at the Cu/insulator interface greatly increases the strength of adhesion between the copper and the insulator. Bottom-up Filling of Copper and Alloy in Narrow Features: Narrow trenches, with widths narrow than 30 nm and aspect ratios up to 9:1, can be filled with copper or copper-manganese alloy in a bottom-up fashion using a surfactant-catalyzed CVD process. A conformal manganese nitride \((Mn_4N)\) layer serves as a diffusion barrier and adhesion layer. Iodine atoms chemisorb on the \(Mn_4N\) layer and are then released to act as a catalytic surfactant on the surface of the growing copper layer to achieve void-free, bottom-up filling. Upon post-annealing, manganese in the alloy diffuses out from the copper and forms a self-aligned barrier in the surface of the insulator. Conformal Seed Layers for Plating Through-Silicon Vias: Through-silicon vias (TSV) will speed up interconnections between chips. Conformal, smooth and continuous seed layers in TSV holes with aspect ratios greater than 25:1 can be prepared using vapor deposition techniques. \(Mn_4N\) is deposited conformally on the silica surface by CVD to provide strong adhesion at Cu/insulator interface. Conformal copper or Cu-Mn alloy seed layers are then deposited by an iodine-catalyzed direct-liquid-injection (DLI) CVD process.en_US
dc.description.sponsorshipChemistry and Chemical Biologyen_US
dc.language.isoen_USen_US
dash.licenseLAA
dc.subjectchemistryen_US
dc.subjectmaterials scienceen_US
dc.subjectbarrier and adhesion layeren_US
dc.subjectdirect-liquid-injectionen_US
dc.subjectchemical vapor depositionen_US
dc.subjectcopper interconnectsen_US
dc.subjectmanganeseen_US
dc.subjectmicroelectronicsen_US
dc.titleChemical Vapor Deposition of Thin Film Materials for Copper Interconnects in Microelectronicsen_US
dc.typeThesis or Dissertationen_US
dash.depositing.authorAu, Yeung Billy
dc.date.available2012-07-24T13:10:04Z
thesis.degree.date2012en_US
thesis.degree.disciplineChemistry and Chemical Biologyen_US
thesis.degree.grantorHarvard Universityen_US
thesis.degree.leveldoctoralen_US
thesis.degree.namePh.D.en_US
dash.contributor.affiliatedAu, Yeung


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