Nanoscale Imaging and Control of Resistance Switching in VO2 at Room Temperature Jeehoon Kim,1 Changhyun Ko,2 Alex Frenzel,1 Shriram Ramanathan,2 and Jennifer E. Ho man1, a) 1)Department of Physics, Harvard University, Cambridge, MA 02138, U. S. A. 2)School of Engineering and Applied Sciences, Harvard University, Cambridge, MA 02138, U. S. A. (Dated: 25 May 2010) We demonstrate controlled local phase switching of a VO2 lm using a biased conducting atomic force microscope tip. After application of an initial, higher ?training? voltage, the resistance transition is hysteretic with IV loops converging upon repeated voltage sweep. The threshold Vset to initiate the insulator-to-metal transition is on order 5 V at room temperature, and increases at low temperature. We image large variations in Vset from grain to grain. Our imaging technique opens up the possibility for an understanding of the microscopic mechanism of phase transition in VO2 as well as its potential relevance to solid state devices. An insulator-to-metal transition may be triggered in VO2 as a function of temperature1, strain2, electric eld3, or optical excitation4. This transition has use- ful properties such as fast 80 fs switching time5, high resistivity ratio, large change in optical re ectance6, and tunability near room temperature. Proposed ap- plications include bolometers7, memristors8, tunable- frequency metamaterials9, and data storage10. Sensor applications typically require negligible hystere- sis, while memory applications call for maximum hystere- sis, but all applications seek to maximize the resistivity ratio (RR). Single crystal VO2 exhibits RR up to 105, but bulk single crystals pose problems for real devices due to cracking on repeated cycle through the transition11. Epitaxial lms on insulating Al2O3 may have RR up to 10412. As a route to interface with existing electron- ics, recent e ort has been devoted to lm growth on Si substrates13, where voltage-controlled switching of VO2 in capacitor geometry has been demonstrated at room temperature14. However, the lattice mismatch results in polycrystalline VO2 lms with RR so far limited to 103. It is therefore important to understand the ef- fects of grain size and the role of grain boundaries in de- termining hysteresis loop properties RR, Vset, and Vreset. To date, the voltage triggered transition has been demon- strated down to 200 nm, but only in a xed area com- posed of multiple grains15. Here we present nanoscale im- ages of the voltage-triggered transition: we resolve single grains as small as tens of nanometers. We study a 200 nm thick VO2 lm grown by rf sput- tering from a VO2 target onto a heavily As-doped Si substrate (n-type, with resistivity 0:002 0:005 cm)14. X-ray di raction data in Fig. 1a corresponds to a poly- crystalline, monoclinic VO2 phase. Fig. 1b shows the thermal phase transition with RR > 102. From AFM topography, the typical lateral diameter of a VO2 grain is 100 nm, and the RMS surface roughness is 6 nm. To investigate this lm, we use a home-built force mi- croscope with a conducting cantilever of spring constant a)Electronic mail: jho man@physics.harvard.edu kc = 40 N=m17. We touch down on the surface with feed- back to x cantilever de ection at a typical setpoint of 4 nm, corresponding to a force of 160 nN, and a pres- sure of 800 bar (assuming a tip contact area diameter 50 nm). The transition temperature has been shown to shift most signi cantly with c-axis uniaxial stress, at a rate of 1:2 K=kbar18. The force applied by the tip therefore corresponds to change in local transition tem- perature Tc of at most 1 K19. Upon rst upward voltage sweep at a given location, we typically observe a sudden transition from the insulating to the metallic state at a ?training? voltage VT 12 V. The transition is hysteretic, returning to the insulating state only at a much lower voltage Vreset. Subsequent sweeps show transitions at lower Vset, but the hystere- sis remains, and IV loops roughly stabilize with typical 5% jitter around Vset 5 V and Vreset 3 V. This is comparable to the 3% stability of transition temperatures 300 320 340 360 380 102 103 104 105 Heating Cooling 25 30 35 40 45 500 10 20 30 T (Kelvin)2?(Degrees) CP S R (?) (011) (200)(020) (012) Monoclinic VO2(room temperature)(a) (b) VO2 n-type Si Pd FIG. 1. (Color online) (a) X-ray di raction (XRD) pro- le, performed on a Scintag XDS2000 di ractometer using Cu K radiation ( 1:5418 A) at incidence angle of 1 . The observed peaks correspond to the monoclinic VO2 phase and demonstrate polycrystallinity.16 (b) The resistivity ra- tio is > 102 as a function of temperature, measured in two- point geometry as shown in the inset. For this data, voltage was applied and current measured between two neighboring 500 500 m2 Pd contact pads, centered 1 mm apart. Vary- ing the distance between Pd pads did not alter the resistance, demonstrating that the resistance is entirely vertical through the VO2 lm, with negligible contribution from the doped Si substrate or the SiOx interface. 2 0 2 4 6 8 100 100 200 300 400 500 600 Bias (V) Curre nt (? A) 0 2 4 6 8 10 12Bias (V) Curre nt (? A) Cr/Au coated tip n-type Si V VO film(~200 nm) SiO nativeoxide (3-4 nm) 2 x (a) (b) (c) (d) (e) (f) 200 1 T = 293 K T = 293 K T = 106.75 K Position (?m)Heigh t (nm) 1 14 0 50 100 150 2004 5 6 Sweep number V (V) set 50 100 150 200 Sweep number 0 0.5 1 1.5 20 4020 (g) 50 100 150 200 250 300 FIG. 2. (Color online) (a) Schematic of the microscope tip and sample geometry. (b) Height trace from AFM topogra- phy demonstrates the tip resolution and VO2 surface rough- ness. (c) 14 consecutive IV sweeps at a single location at T = 107 K. (d-e) 200 consecutive IV sweeps at 2 di er- ent representative locations, at room temperature. Iterations start from black and run through light blue. Training voltage is VT 12 V in d-e and > 40 V in c. (f-g) Vset as a function of iteration number for the data from d-e. over 102 thermal cycles previously observed in a macro- scopic junction on a VO2 lm on Al2O3 substrate20. Typ- ical voltage sweeps are shown in Fig. 2. The following points are worth noting in this unique measurement ge- ometry: (1) Unlike in prior work on 200 nm Au dots15, we rarely see multiple jumps in a single curve; we really can access single grains! (2) As in this prior work, the mea- sured RR for the entire tip-VO2-Si structure is limited to < 10, which we attribute to resistance Rs 15 k , in series with the VO2 lm. (3) Loops do not depend on sweep speed from 6 V=s to 16 V=s. (4) Loop character- istics exhibit negligible dependence on force within the range 120 to 420 nN used in this study. We next investigate the spatial dependence of the tran- sition. After ?training? an area by scanning with a bias voltage of 11:1 V, we rescan with increasing bias to watch the details of metallic puddle growth. As shown in Fig. 3, the insulating state displays variations in conductivity up to 100% of the mode value. Conductivity appears constant within each grain, but slowly varies from one grain to the next. Conductivity appears lower in the grain boundaries, which suggests a di erent stoichiomet- ric phase in the grain boundaries. (We cannot rule out a topographic artifact from variations in the contact area of the tip between grains and grain boundaries, but such an e ect would likely result in increased contact area in the grain boundaries, thus apparent higher conductiv- ity.) On increasing voltage, the metallic state nucleates at the grains with largest insulating-state conductivity, grows into a larger metallic puddle, and shrinks again as the voltage is decreased. This type of switching is typi- cally referred to as ?threshold switching? (as opposed to ?memory switching? in which the resistance state remains changed after removal of the applied voltage). Granular- ity and lower conductivity grain boundaries remain ap- parent in the metallic as well as the insulating phase. Although previous researchers have suggested that eld or carrier injection alone may be su cient to in- duce the transition21,22, evidence suggests that in our experimental geometry the transition results most di- rectly from Joule heating. At room temperature, the local power injection immediately prior to the insulator- to-metal transition shown in Fig. 2d, is P 100 W. Given the speci c heat C = 690 J=(K kg) and the mass density = 4340 kg=m3 of VO2, the time to heat a (g)(a) (e) (d)4.44 V 4.93 V(b)3.45 V 40 nm 0 3.95 V 4.44 V 4.93 V 5.43 V (f)5.43 V(c) 500 nm 3.95 V 0 50 100 150Current (?A) 3.45 V FIG. 3. (Color online) (a) AFM topography of the VO2 sur- face. (b-f) Current maps at increasing bias voltage show the metallic puddle seeded at 2 grains (outlined in black), grow- ing with increasing bias. Grain boundaries are drawn in white in the upper right corners of a-b, which were acquired simul- taneously, to emphasize the correlation between grain loca- tions and regions of constant current. (g) Current distribu- tions for b-f are bimodal, showing the jump between insulat- ing and metallic state conductivity. A second set of images (not shown), acquired in this same area, as the applied volt- age was subsequently decreased by the same increments, show the shrinking and disappearance of the metallic puddle. 3 single grain of volume V (100 nm)3 from room tem- perature (TRT 293 K) to the transition temperature (Tc 340 K) would be only 1:4 ns. The empirical fact that the grain does not transition sooner implies signi - cant thermal conduction away from each grain. The hys- teresis may be explained as follows: on upwards volt- age sweep, the switching occurs just as the Joule heating exceeds the heat ow out by enough to raise the grain temperature above its Tc. Upon transition, the current ow and resultant Joule heating suddenly increase, so the grain temperature does not immediately drop below Tc as the voltage is swept back down. But the increased Joule heating at the higher current state causes the sur- rounding grains and Si substrate to also increase in tem- perature, which increases their thermal conductivity, so heat ows away more quickly. The grain may then return to the insulating state on downwards voltage sweep even though the power input is still higher than the power input on insulator-to-metal transition. The hypothesis of Joule heating is further suggested by the following observations: (1) Transition occurs at the same absolute value of voltage, to within 10%, for positive and negative applied bias. (2) The transition is seeded at the grains with the largest insulating state conductance (i.e. the largest Joule heating for a given applied voltage). (3) The transition can also be triggered by voltage at the much reduced global temperature of 107 K, as shown in Fig. 2c, but the transition is shifted to higher voltage and power, as would be required to achieve the much larger T = 234 K. The origin of the training voltage remains unknown. We rule out surface contamination, because use of the tip to scrape the VO2 surface, in situ in vacuum, with enough force to physically remove up to 10% of the VO2 material, does not lower the initial transition voltage. Possibly, the training alters the native SiOx layer. More likely, the training may occur within the VO2 lm itself, possibly due to O migration which improves grain stoichiometry, or due to formation of more conductive phases such as Magneli (VnO2n 1) phases23 in the grain boundaries. In conclusion, single grain switching with reproducible hysteresis demonstrates the scaling of the insulator-to- metal transition in VO2 down to tens of nanometers. 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