Kanev, SvilenJones, Timothy M.Wei, Gu-YeonBrooks, DavidJanapa Reddi, Vijay2016-02-172013Kanev, Svilen, Timothy M. Jones, Gu-Yeon Wei, David Brooks, and Vijay Reddi. 2013. “Measuring Code Optimization Impact on Voltage Noise.” In the Proceedings of the 9th Silicon Errors in Logic - System Effects Workshop (SELSE 9), Palo Alto, California, March 26 – 27, 2013.http://nrs.harvard.edu/urn-3:HUL.InstRepos:25415919In this paper, we characterize the impact of compiler optimizations on voltage noise. While intuition may suggest that the better processor utilization ensured by optimizing compilers results in a small amount of voltage variation, our measurements on a Intel® Core™2 Due Processor show the opposite - the majority of SPEC 2006 benchmarks exhibit more voltage droops when aggressively optimized. We show that this increase in noise could be sufficient for a net performance decrease in a typical case, resilient design.en-USConference Paper2014-10-03Svilen Kanev and Timothy M. Jones and Gu-Yeon Wei and David Brooks and Vijay Reddi2016-02-1710.pdf