Person: Li, Kecheng
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Li
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Kecheng
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Li, Kecheng
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Publication Pure and conformal CVD nickel and nickel monosilicide in high-aspect-ratio structures analyzed by atom probe tomography(AIP Publishing, 2017) Li, Kecheng; Feng, Jun; Kwak, Junkeun; Yang, Jing; Gordon, RoyLow-resistance and uniform contacts are needed for modern 3-D silicon transistors. The formation of high-quality and conformal nickel silicide at the interface between silicon and metal contacts is a possible solution. Direct-liquid-evaporation chemical vapor deposition is used to deposit nickel films conformally inside narrow silicon trenches. The deposited Ni is then reacted with a silicon substrate to form nickel monosilicide. Atom probe tomography (APT) is used to find and count the atoms in nanoscale regions inside these 3-D structures. APT shows that these NiSi films are stoichiometrically pure, single-phase, and conformal even inside trenches with high aspect ratios. The APT technique measures all impurities, including carbon, nitrogen, and oxygen, to have concentrations less than 0.1 at. %.Publication Direct-liquid-evaporation chemical vapor deposition of smooth, highly conformal cobalt and cobalt nitride thin films(Royal Society of Chemistry (RSC), 2015) Yang, Jing; Li, Kecheng; Feng, Jun; Gordon, RoyPublication Vapor Deposition of Copper-Manganese Interconnects(IEEE, 2016) Gordon, Roy; Feng, Jun; Li, Kecheng; Gong, XianChemical vapor deposition (CVD) of copper and manganese can produce interconnects scaled down to below 10 nm, while enhancing their conductivity and lifetime. CVD using similar super-conformal processes can enable very narrow through-silicon-vias, as well as tiny and robust flexible wires between chips. Silica insulating layers can be made by a super-conformal and rapid atomic layer deposition (ALD) process.Publication Direct Liquid Evaporation Chemical Vapor Deposition(DLE-CVD) of Nickel, Manganese and Copper-Based Thin Films for Interconnects in Three-Dimensional Microelectronic Systems(2016-05-19) Li, Kecheng; Gordon, Roy; Spaepen, Frans; Vlassak, JoostElectrical interconnects are an intrinsic part of any electronic system. These interconnects have to perform reliably under a wide range of environmental conditions and survive stresses induced from thermal, mechanical, corrosive and electrical factors. Semiconductor technology is predominantly planar in nature, posing a severe limitation to the degree of device integrations into systems such as micro-processors or memories. 3D transistor FinFET (Fin type Field Effect Transistors) has been used by Intel since the advent of its 22 nm technology node, and has now advanced further down to 14 nm. While the technology nodes have consistently been shrinking in line with Moore’s law, increasing difficulties in scaling down the feature sizes in transistors is urging the industry to seek alternative fabrication approaches for the extension of Moore’s law. The most promising solution thus far is 3D heterogeneous integration, which will stack logical and analog chips together to enable multi functions chip without the need to scale the size of transistors with Moore’s law. Furthermore, as wearable electronics are fast growing in the next big wave in consumer electronics after the smartphone era, interconnects face the unique challenge of having to be embedded into fashion and withstand the mechanical stresses from everyday activity. This makes the role interconnects even more important as well as making it the main bottleneck to unleashing the full performance of the 3D microelectronics systems. This thesis explores the fabrication, characterization and application of Nickel, Manganese, Copper based thin films for the interconnects of 3D microelectronics systems. Direct Liquid Evaporation-Chemical Vapor Deposition (DLE-CVD) technique has been proven to be a high-throughput process for high-quality Nickel, Manganese, Copper based thin films with excellent conformality in complex architectures as the interconnects for state-of-the-art 3D microelectronics systems. Chapter 2 introduces the advantages of DLE-CVD process and its application in deposition of Nickel, Manganese and Copper based thin films. DLE-CVD process is used to deliver consistent and high vapor concentrations of Nickel, Manganese and Copper precursors to coat nanostructures with high aspect ratios. Chapter 3 demonstrates the atom probe tomography (APT) as an effective method for understanding the 3D microstructure and compositional properties in thin films at an atomic scale. 3D compositional information of DLE-CVD NiNx, NiSi thin films from inside and outside regions of the trench structures have been investigated using APT. The APT characterization technique provides a unique tool that can be applied both to the design of 3D nanostructured microelectronic devices and to the further understanding of the fundamental physical properties. Chapter 4 highlights the application of DLE-CVD manganese and copper based thin film process in the complex nanostructures for 3D microelectronic systems. Narrow trenches with width under 30 nm are the key nanostructure in the local interconnects in 3D FINFET with technology node smaller than 14 nm for use in microelectronic chips. It can be filled with DLE-CVD copper and copper-manganese alloy in a bottom-up fashion using a surfactant-catalyzed CVD process. An ultrathin manganese nitride layer (~ 3 nm) acts as a diffusion barrier and an adhesion layer. Through-silicon vias (TSVs) plays a crucial role in advancing the 3D integration of semiconductor devices by improving the performances of interconnections between chips. Using DLE-CVD processes, conformal, smooth and continuous copper/copper-manganese seed layers can be prepared in TSVs with aspect ratio greater than 25:1. manganese Nitride film is deposited via the DLE-CVD process to serve as an adhesion and barrier layer. Dow Chemicals achieved void-free TSV filling through the electroplating process. Chapter 5 shows the application of the DLE-CVD manganese and copper based thin film process in the metallization of polyaramids for the application in the interconnects embedded in wearable electronic systems. Conformal and conductive coatings of copper-manganese have been successfully deposited on Kevlar fibers using the DLE-CVD process with complete film coverage. The mechanical resistance of copper-manganese coated Kevlar was tested via our in-house robotic arm system, demonstrating how the electrical resistance of the wire remains unchanged despite being flexed repeatedly to a bend of 5mm radius for half a million times.Publication Quantitative Evaluation of Cobalt Disilicide/Si Interfacial Roughness(The Electrochemical Society, 2017) Yang, Jing; Feng, Jun; Li, Kecheng; Bhandari, Harish B; Li, Zhefeng; Gordon, RoyThe formation of smooth, conformal cobalt disilicide (CoSi2) without facets or voids is critical for microelectronic device reliability owing to the ultra-shallow contact areas. Here we demonstrate the formation of smooth and conformal CoSi2 films by chemical vapor deposition (CVD) of cobalt nitride (CoxN) films on silicon (Si) or on silicon on insulator (SOI) substrates, followed by in-situ rapid thermal annealing (RTA) at 700°C. To reveal the CoSi2/Si interfacial morphology, we report a back-to-front sample preparation method, in which mechanical polishing, anisotropic tetramethylammonium hydroxide (TMAH) wet etching, hydrofluoric acid (HF) wet etching, and isotropic xenon difluoride (XeF2) dry etching are employed to remove the SOI substrate from the back side to expose the CoSi2/Si interface. This method offers a robust and reliable procedure for quantitative assessment of the CoSi2/Si interfacial roughness, as well as analytical support for advanced fabrication process development.Publication Low Temperature Chemical Vapor Deposition of Cuprous Oxide Thin Films Using a Copper(I) Amidinate Precursor(American Chemical Society (ACS), 2019-10-23) Chua, Danny; Kim, Sang Bok; Li, Kecheng; Gordon, RoyCuprous oxide (Cu2O) thin films were grown by chemical vapor deposition (CVD) using precursors (N, N’- di-sec-butylacetamidinato)copper(I) and degassed water at low substrate temperatures of 125 to 225 °C. Despite being a widely studied material, vapor deposition of Cu2O faces numerous challenges in avoiding material agglomeration, in obtaining high phase purity, and in limiting the process temperature to below 200 °C for temperature sensitive applications. We deposited pinhole-free single-phase oxide films that exhibit Hall mobilities up to 17 cm2 V-1 s-1 and wide band gaps exceeding 2.6 eV that are free from contaminants such as nitro-gen, carbon, and cupric oxide (CuO). With good control of growth parameters (source temperature, substrate temperature, flow rate of carrier gas, etc), the film morphologies could be tuned to achieve either smooth, pinhole-free coatings or highly crys-talline thin films with rough surfaces that are suitable for applications to solar cells.