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Input-aware auto-tuning of compute-bound HPC kernels

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2017-11-12

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Philippe Tillet and David Cox. Input-Aware Auto-Tuning of Compute-Bound HPC Kernels. International Conference for High Performance Computing, Networking, Storage, and Analysis (SC17), November 12–17, 2017, Denver, CO, USA

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Abstract

Efficient implementations of HPC applications for parallel architectures generally rely on external software packages (e.g., BLAS, LAPACK, CUDNN). While these libraries provide highly optimized routines for certain characteristics of inputs (e.g., square matrices), they generally do not retain optimal performance across the wide range of problems encountered in practice. In this paper, we present an input-aware auto-tuning framework for matrix multiplications and convolutions, ISAAC, which uses predictive modeling techniques to drive highly parameterized PTX code templates towards not only hardware-, but also application-specific kernels. Numerical experiments on the NVIDIA Maxwell and Pascal architectures show up to 3x performance gains over both cuBLAS and cuDNN after only a few hours of auto-tuning.

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