Audio Processing on Field-Programmable Gate Arrays

Abstract

This document outlines the methods employed from conception to implementation and testing of a hardware-based digital audio processing system. The eight-month project was divided into phases of problem definition, system design, implementation via register-transfer level (RTL) code, and finally measurement and analysis of the design. The system was designed with live performance applications in mind and aims to achieve technical specifications that enforce high reconfigurability and signal quality, minimal latency, and low utilization of hardware resources. These technical specifications define a high-performance, low-cost system that acts as a proof-of-concept system that, with further development, has the potential to outperform the state-of-the-art with regard to both adaptability and pricing without sacrificing latency or signal quality.