Building a Fault-Tolerant Quantum Computer with High-Rate Quantum Codes

Abstract

Quantum error correction offers a path from fragile physical qubits to reliable quantum computation, but the resource cost of conventional architectures remains a central obstacle to useful machines. This thesis develops a full-stack approach based on high-rate quantum low-density parity-check (qLDPC) codes, which encode many logical qubits per block and can substantially reduce fault-tolerance overhead. Its central premise is that favorable code parameters are useful only when memory, hardware, logical operations, decoding, and interconnects are designed together. Quantum memories based on hypergraph-product, lifted-product, spatially coupled, and balanced-product codes provide the underlying algebraic structure, while reconfigurable neutral-atom arrays realize their nonlocal connectivity through parallel optical control, high-fidelity Rydberg gates, and loss-resolving readout. Universal logical computation is enabled through teleportation, homomorphic gates, and finite-block-length tricycle constructions for low-cost non-Clifford resource states. Structure-aware neural decoders learn spatial, temporal, and gate-induced correlations while remaining compatible with real-time feed-forward, and high-rate entanglement-distillation protocols extend the same constant-overhead principles to quantum interconnects. Together, these results outline an integrated route toward practical fault-tolerant quantum computers built from high-rate quantum codes.