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Yao, Jun

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Yao

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Jun

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Yao, Jun

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Now showing 1 - 4 of 4
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    Publication
    Nanowire nanocomputer as a finite-state machine
    (Proceedings of the National Academy of Sciences, 2014) Yao, Jun; Yan, Hao; Das, Shamik; Klemic, James F.; Ellenbogen, James C.; Lieber, Charles
    Implementation of complex computer circuits assembled from the bottom up and integrated on the nanometer scale has long been a goal of electronics research. It requires a design and fabrication strategy that can address individual nanometer-scale electronic devices, while enabling large-scale assembly of those devices into highly-organized, integrated computational circuits. We describe how such a strategy has led to the design, construction, and demonstration of a nanoelectronic finite-state machine (nanoFSM). The system was fabricated using a design- oriented approach enabled by a deterministic, bottom-up assembly process that does not require individual nanowire registration. This methodology allowed construction of the nanoFSM through modular design employing a multi-tile architecture. Each tile/module consists of two interconnected crossbar nanowire arrays, with each cross-point consisting of a programmable nanowire transistor node. The nanoFSM integrates 180 programmable nanowire transistor nodes in three tiles or six total crossbar arrays, and incorporates both sequential and arithmetic logic, with extensive inter-tile and intra-tile communication that exhibits rigorous input/output (I/O) matching. Our system realizes the complete 2-bit logic flow and clocked control over state registration that are required for a FSM or computer. The programmable multi-tile circuit was also re-programmed to a functionally-distinct 2-bit full adder with 32-set matched and complete logic output. These steps forward and the ability of our new design-oriented deterministic methodology to yield more extensive multi-tile systems, suggest that proposed general-purpose nanocomputers can be realized in the near future.
  • Publication
    A nanoscale combing technique for the large-scale assembly of highly aligned nanowires
    (Springer Science and Business Media LLC, 2013-04-21) Yao, Jun; Yan, Hao; Lieber, Charles
    The controlled assembly of nanowires is a key challenge in the development of a range of bottom-up devices. Recent advances in the post-growth assembly of nanowires and carbon nanotubes have led to alignment ratios of 80–95% for a misalignment angle of ±5° and allowed various multiwire devices to be fabricated. However, these methods still create a significant number of crossing defects, which restricts the development of device arrays and circuits based on single nanowires/nanotubes. Here, we show that a nanocombing assembly technique, in which nanowires are anchored to defined areas of a surface and then drawn out over chemically distinct regions of the surface, can yield arrays with greater than 98.5% of the nanowires aligned to within ±1° of the combing direction. The arrays have a crossing defect density of ∼0.04 nanowires per µm and efficient end registration at the anchoring/combing interface. With this technique, arrays of single-nanowire devices are tiled over chips and shown to have reproducible electronic properties. We also show that nanocombing can be used for laterally deterministic assembly, to align ultralong (millimetre-scale) nanowires to within ±1° and to assemble suspended and crossed nanowire arrays.
  • Publication
    Programmable Resistive-Switch Nanowire Transistor Logic Circuits
    (American Chemical Society (ACS), 2014-08-20) Shim, Wooyoung; Yao, Jun; Lieber, Charles
    Programmable logic arrays (PLA) constitute a promising architecture for developing increasingly complex and functional circuits through nanocomputers from nanoscale building blocks. Here we report a novel one-dimensional PLA element that incorporates resistive switch gate structures on a semiconductor nanowire and show that multiple elements can be integrated to realize functional PLAs. In our PLA element, the gate coupling to the nanowire transistor can be modulated by the memory state of the resistive switch to yield programmable active (transistor) or inactive (resistor) states within a well-defined logic window. Multiple PLA nanowire elements were integrated and programmed to yield a working 2-to-4 demultiplexer with long-term retention. The well-defined, controllable logic window and long-term retention of our new one-dimensional PLA element provide a promising route for building increasingly complex circuits with nanoscale building blocks.
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    Publication
    Antilocalization of Coulomb Blockade in a Ge/Si Nanowire
    (American Physical Society (APS), 2014) Higginbotham, A; Kuemmeth, Ferdinand; Larsen, T. W.; Fitzpatrick, M.; Yao, Jun; Yan, H.; Lieber, Charles; Marcus, C
    The distribution of Coulomb blockade peak heights as a function of magnetic field is investigated experimentally in a Ge/Si nanowire quantum dot. Strong spin-orbit coupling in this hole-gas system leads to antilocalization of Coulomb blockade peaks, consistent with theory. In particular, the peak height distribution has its maximum away from zero at zero magnetic field, with an average that decreases with increasing field. Magnetoconductance in the open-wire regime places a bound on the spin-orbit length (lso < 20 nm), consistent with values extracted in the Coulomb blockade regime (lso < 25 nm).