High Performance Atomic-Layer-Deposited \(LaLuO_3/Ge\)-on-Insulator p-Channel Metal-Oxide-Semiconductor Field-Effect Transistor with Thermally Grown \(GeO_2\) as Interfacial Passivation Layer

Abstract

Enhancement-mode p-channel metal-oxide-semiconductor field-effect transistor (MOSFET) on germanium-on-insulator substrate is fabricated with atomic-layer-deposited (ALD) (LaLuO_3) as gate dielectric. Significant improvement in both on-state current and effective hole mobility has been observed for devices with thermal (GeO_2) passivation. The negative threshold voltage ((V_T)) shift in devices with (GeO_2) interfacial layer (IL) further demonstrates the effectiveness of surface passivation. Results from low temperature mobility characterization show that phonon scattering is the dominant scattering mechanism at a large inversion charge, indicating good interface quality. The combination of higher-k (LaLuO_3) and ultrathin (GeO_2) IL is a promising solution to the tradeoff between the aggressive equivalent oxide thickness scaling and good interface quality.