Person:

Gordon, Roy

SnS is a promising earth-abundant material for photovoltaic applications. Heterojuction solar cells were made by vapor deposition of p-type tin(II) sulfide, SnS, and n-type zinc oxysulfide, Zn(O,S), using a device structure of soda-lime glass/Mo/SnS/Zn(O,S)/ZnO/ITO. A record efficiency was achieved for SnS-based thin-film solar cells by varying the oxygen-to-sulfur ratio in Zn(O,S). Increasing the sulfur content in Zn(O,S) raises the conduction band offset between Zn(O,S) and SnS to an optimum slightly positive value. A record SnS/Zn(O,S) solar cell with a S/Zn ratio of 0.37 exhibits short circuit current density ((J_{sc})), open circuit voltage ((V_{oc})), and fill factor (FF) of (19.4 mA/cm^{2}), 0.244 V, and 42.97%, respectively, as well as an NREL-certified total-area power-conversion efficiency of 2.04% and an uncertified active-area efficiency of 2.46%.

High-performance InGaAs gate-all-around (GAA) nanowire MOSFETs with channel length ((L_{ch})) down to 20 nm are fabricated by integrating a higher-k (LaAlO_3)-based gate-stack with an equivalent oxide thickness of 1.2nm. It is found that inserting an ultrathin (0.5 nm) (Al_2O_3) interfacial layer between the higher k (LaAlO_3) and InGaAs can significantly improve the interface quality and reduce device variation. As a result, a record low subthreshold swing of 63 mV/dec is demonstrated at sub-80-nm (L_{ch}) for the first time, making InGaAs GAA nanowire devices a strong candidate for future low-power transistors.

Ni materials in the form of NiNx, NiO or NiSi have been found to be particularly important in memory as well as logic applications. Nickel silicide (NiSi) is emerging as the choice material for contact applications in semiconductor devices with 45nm technology node and beyond.(^{1}) Recent research shows that the resistance switching characteristics of NiO thin film, in combinations with a metal-insulator-metal (MIM) structure, offer potential applications for the next generation nonvolatile resistive random access memory devices.(^{2}) As the feature sizes of microelectronic circuits are shrinking, more complex structures are going to be adopted by the industry. Atomic layer deposition (ALD) is the preferred technique that can produce ultra-thin conformal layers (<10 nm). Nickel amidinate (Ni-AMD) has been demonstrated as an excellent precursor for both ALD and CVD Ni thin films due to its greater thermal stability and high reactivity. (^{3}) We report our results on deposition of NiO, NiNx and its conversion into NiSi using Ni-AMD, and discuss the chemistry of forming (NiO), (NiN_x) and (NiSi) films with vapor depletion and direct liquid injection (DLI) using various organic solvents that enhance the deposition process.

Enhancement-mode p-channel metal-oxide-semiconductor field-effect transistor (MOSFET) on germanium-on-insulator substrate is fabricated with atomic-layer-deposited (ALD) (LaLuO_3) as gate dielectric. Significant improvement in both on-state current and effective hole mobility has been observed for devices with thermal (GeO_2) passivation. The negative threshold voltage ((V_T)) shift in devices with (GeO_2) interfacial layer (IL) further demonstrates the effectiveness of surface passivation. Results from low temperature mobility characterization show that phonon scattering is the dominant scattering mechanism at a large inversion charge, indicating good interface quality. The combination of higher-k (LaLuO_3) and ultrathin (GeO_2) IL is a promising solution to the tradeoff between the aggressive equivalent oxide thickness scaling and good interface quality.

The first inversion-mode gate-all-around (GAA) III-V MOSFETs are experimentally demonstrated with a high mobility In0.53Ga0.47As channel and atomic-layer-deposited (ALD) Al2O3/WN gate stacks by a top-down approach. A well-controlled InGaAs nanowire release process and a novel ALD high-k/metal gate process has been developed to enable the fabrication of III-V GAA MOSFETs. Well-behaved on-state and off-state performance has been achieved with channel length (Lch) down to 50nm. A detailed scaling metrics study (S.S., DIBL, VT) with Lch of 50nm - 110nm and fin width (WFin) of 30nm - 50nm are carried out, showing the immunity to short channel effects with the advanced 3D structure. The GAA structure has provided a viable path towards ultimate scaling of III-V MOSFETs.

Thin films of high dielectric constant (\kappa \sim 68) rutile phase titanium dioxide (TiO_2) were grown epitaxially on tin dioxide (SnO_2) substrates, which are a low cost, more abundant alternative to ruthenium electrodes used previously. Atomic layer deposition at low temperature ({250^\circ C}) was used with titanium(IV) tetrakis(isopropoxide) and hydrogen peroxide (H_2O_2) as precursors. The rutile (TiO_2) thin films have crystalline grains that match the structure and orientation of the grains in the polycrystalline rutile phase (SnO_2) substrates. The epitaxial relations can be clearly identified from the continuous lattice fringes across the interfaces.

Bottom-gate thin film transistors with amorphous zinc tin oxide channels were grown by atomic layer deposition (ALD). The films maintained their amorphous character up to temperatures over 500 (^{\circ})C. The highest field effect mobility was ~13 (cm^2/V^.s) with on-to-off ratios of drain current ~10(^9)-10(^{10}). The lowest subthreshold swing of 0.27 V/decade was observed with thermal oxide as a gate insulator. The channel layers grown at 170 (^{\circ})C showed better transistor properties than those grown at 120 (^{\circ})C. Channels with higher zinc to tin ratio (~3-4) also performed better than ones with lower ratios (~1-3).

The growth of of metallic copper by atomic layer deposition (ALD) using copper(I) di-sec-butylacetamidinate (([Cu(^sBu-amd)]_2)) and molecular hydrogen ((H_2)) on (SiO_2/Si) surfaces has been studied. The mechanisms for the initial surface reaction and chemical bonding evolutions with each ALD cycle are inferred from in situ Fourier transform infrared spectroscopy (FTIR) data. Spectroscopic evidence for Cu agglomeration on (SiO_2) is presented involving the intensity variations of the (SiO_2) LO/TO phonon modes after chemical reaction with the Cu precursor and after the (H_2) precursor cycle. These intensity variations are observed over the first 20 ALD cycles at 185°C.

An interlayer of face centered cubic (fcc) Co4N has demonstrated significant improvements in adhesion between copper and diffusion barrier layers. This fcc phase of Co4N was prepared by chemical vapor deposition (CVD) using bis(N-tert-butyl-N′-ethyl-propionamidinato)cobalt(II) and a reactant mixture of NH3 and H2 at substrate temperatures from 100 to 180°C. The Co/N atomic ratio and the phase of cobalt nitride film can be modified by adjusting the ratio of NH3 and H2 in the gas feedstock. The cobalt nitride films prepared by CVD are smooth, highly conformal, and stable against intermixing with copper up to at least 400°C. This fcc cobalt nitride material has very strong adhesion to copper due to the small lattice mismatch (−1 to 2%) between (fcc-Co_4N) and fcc Cu. Copper wires should be stabilized against failure by electromigration when fcc cobalt nitride interlayers are placed between the copper and surrounding diffusion barriers.